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FizzBuzzAsm_fr-v

Version

% frv-linux-gcc -v
Using built-in specs.
Target: frv-linux
Configured with: /home/jbglaw/devel/sources/gcc//configure --target frv-linux --prefix /home/jbglaw/devel/build-temp-frv-linux/usr --enable-languages=c,c++ --disable-libc --disable-libmudflap --disable-libssp --disable-multilib --disable-shared --enable-static --with-system-zlib --enable-threads
Thread model: posix
gcc version 4.5.0 20090414 (experimental) (GCC) 

Optimized


fizzbuzz.o:     file format elf32-frvfdpic


Disassembly of section .text:

00000000 <main>:
   0:	82 40 1f c8 	addi sp,-56,sp
   4:	85 48 10 28 	sti fp,@(sp,40)
   8:	84 40 10 28 	addi sp,40,fp
   c:	88 0d 01 c5 	movsg lr,gr5
  10:	8b 48 20 08 	sti gr5,@(fp,8)
  14:	a5 4c 10 00 	stdi gr18,@(sp,0)
  18:	a9 4c 10 08 	stdi gr20,@(sp,8)
  1c:	ad 4c 10 10 	stdi gr22,@(sp,16)
  20:	b1 4c 10 18 	stdi gr24,@(sp,24)
  24:	9f 48 2f fc 	sti gr15,@(fp,-4)
  28:	a4 fc 00 01 	setlos 0x1,gr18
  2c:	a6 f8 88 88 	sethi 0x8888,gr19
  30:	a6 f4 88 89 	setlo 0x8889,gr19
  34:	a8 f8 66 66 	sethi 0x6666,gr20
  38:	a8 f4 66 67 	setlo 0x6667,gr20
  3c:	aa f8 55 55 	sethi 0x5555,gr21
  40:	aa f4 55 56 	setlo 0x5556,gr21
  44:	ae f8 00 00 	sethi hi(0x0),gr23
			44: R_FRV_GPRELHI	.rodata.str1.4+0x1c
  48:	ae f4 00 00 	setlo lo(0x0),gr23
			48: R_FRV_GPRELLO	.rodata.str1.4+0x1c
  4c:	b0 f8 00 00 	sethi hi(0x0),gr24
			4c: R_FRV_GPRELHI	.rodata.str1.4+0x14
  50:	b0 f4 00 00 	setlo lo(0x0),gr24
			50: R_FRV_GPRELLO	.rodata.str1.4+0x14
  54:	b2 f8 00 00 	sethi hi(0x0),gr25
			54: R_FRV_GPRELHI	.rodata.str1.4+0xc
  58:	b2 f4 00 00 	setlo lo(0x0),gr25
			58: R_FRV_GPRELLO	.rodata.str1.4+0xc
  5c:	ac f8 00 00 	sethi hi(0x0),gr22
			5c: R_FRV_GPRELHI	.rodata.str1.4
  60:	ac f4 00 00 	setlo lo(0x0),gr22
			60: R_FRV_GPRELLO	.rodata.str1.4
  64:	88 01 22 13 	smul gr18,gr19,gr4
  68:	88 01 20 04 	add gr18,gr4,gr4
  6c:	88 b0 40 03 	srai gr4,3,gr4
  70:	8a b1 20 1f 	srai gr18,31,gr5
  74:	88 00 41 05 	sub gr4,gr5,gr4
  78:	8a a0 40 04 	slli gr4,4,gr5
  7c:	88 00 51 04 	sub gr5,gr4,gr4
  80:	80 01 21 44 	subcc gr18,gr4,gr0,icc0
  84:	e0 1a 00 07 	bne icc0,0x2,a0 <main+0xa0>
  88:	88 c8 2f fc 	ldi @(fp,-4),gr4
  8c:	90 c8 40 00 	ldi @(gr4,0),gr8
			8c: R_FRV_GOT12	_gp
  90:	90 01 60 08 	add gr22,gr8,gr8
  94:	9e c8 2f fc 	ldi @(fp,-4),gr15
  98:	80 3c 00 00 	call 98 <main+0x98>
			98: R_FRV_LABEL24	puts
  9c:	c0 1a 00 23 	bra 128 <main+0x128>
  a0:	88 01 22 14 	smul gr18,gr20,gr4
  a4:	88 b0 40 01 	srai gr4,1,gr4
  a8:	8a b1 20 1f 	srai gr18,31,gr5
  ac:	88 00 41 05 	sub gr4,gr5,gr4
  b0:	8a a0 40 02 	slli gr4,2,gr5
  b4:	88 00 50 04 	add gr5,gr4,gr4
  b8:	80 01 21 44 	subcc gr18,gr4,gr0,icc0
  bc:	e0 1a 00 07 	bne icc0,0x2,d8 <main+0xd8>
  c0:	88 c8 2f fc 	ldi @(fp,-4),gr4
  c4:	90 c8 40 00 	ldi @(gr4,0),gr8
			c4: R_FRV_GOT12	_gp
  c8:	90 01 90 08 	add gr25,gr8,gr8
  cc:	9e c8 2f fc 	ldi @(fp,-4),gr15
  d0:	80 3c 00 00 	call d0 <main+0xd0>
			d0: R_FRV_LABEL24	puts
  d4:	c0 1a 00 15 	bra 128 <main+0x128>
  d8:	8c 01 22 15 	smul gr18,gr21,gr6
  dc:	8a b1 20 1f 	srai gr18,31,gr5
  e0:	88 88 60 00 	ori gr6,0,gr4
  e4:	88 00 41 05 	sub gr4,gr5,gr4
  e8:	8a a0 40 01 	slli gr4,1,gr5
  ec:	88 00 50 04 	add gr5,gr4,gr4
  f0:	80 01 21 44 	subcc gr18,gr4,gr0,icc0
  f4:	e0 1a 00 07 	bne icc0,0x2,110 <main+0x110>
  f8:	88 c8 2f fc 	ldi @(fp,-4),gr4
  fc:	90 c8 40 00 	ldi @(gr4,0),gr8
			fc: R_FRV_GOT12	_gp
 100:	90 01 80 08 	add gr24,gr8,gr8
 104:	9e c8 2f fc 	ldi @(fp,-4),gr15
 108:	80 3c 00 00 	call 108 <main+0x108>
			108: R_FRV_LABEL24	puts
 10c:	c0 1a 00 07 	bra 128 <main+0x128>
 110:	88 c8 2f fc 	ldi @(fp,-4),gr4
 114:	90 c8 40 00 	ldi @(gr4,0),gr8
			114: R_FRV_GOT12	_gp
 118:	90 01 70 08 	add gr23,gr8,gr8
 11c:	92 89 20 00 	ori gr18,0,gr9
 120:	9e c8 2f fc 	ldi @(fp,-4),gr15
 124:	80 3c 00 00 	call 124 <main+0x124>
			124: R_FRV_LABEL24	printf
 128:	a4 41 20 01 	addi gr18,1,gr18
 12c:	80 55 20 65 	subicc gr18,101,gr0,icc0
 130:	e0 1a ff cd 	bne icc0,0x2,64 <main+0x64>
 134:	a4 cc 10 00 	lddi @(sp,0),gr18
 138:	a8 cc 10 08 	lddi @(sp,8),gr20
 13c:	ac cc 10 10 	lddi @(sp,16),gr22
 140:	b0 cc 10 18 	lddi @(sp,24),gr24
 144:	8a c8 20 08 	ldi @(fp,8),gr5
 148:	84 08 21 00 	ld @(fp,gr0),fp
 14c:	82 40 10 38 	addi sp,56,sp
 150:	80 30 50 00 	jmpl @(gr5,gr0)
 154:	80 88 00 00 	nop
 158:	80 88 00 00 	nop
 15c:	80 88 00 00 	nop

Normal


fizzbuzz.o:     file format elf32-frvfdpic


Disassembly of section .text:

00000000 <main>:
   0:	82 40 1f e0 	addi sp,-32,sp
   4:	85 48 10 10 	sti fp,@(sp,16)
   8:	84 40 10 10 	addi sp,16,fp
   c:	88 0d 01 c5 	movsg lr,gr5
  10:	8b 48 20 08 	sti gr5,@(fp,8)
  14:	a5 48 10 00 	sti gr18,@(sp,0)
  18:	a4 88 f0 00 	ori gr15,0,gr18
  1c:	88 fc 00 01 	setlos 0x1,gr4
  20:	89 48 2f fc 	sti gr4,@(fp,-4)
  24:	c0 1a 00 4b 	bra 150 <main+0x150>
  28:	8c c8 2f fc 	ldi @(fp,-4),gr6
  2c:	88 f8 88 88 	sethi 0x8888,gr4
  30:	88 f4 88 89 	setlo 0x8889,gr4
  34:	88 00 62 04 	smul gr6,gr4,gr4
  38:	88 00 60 04 	add gr6,gr4,gr4
  3c:	8a b0 40 03 	srai gr4,3,gr5
  40:	88 b0 60 1f 	srai gr6,31,gr4
  44:	8a 00 51 04 	sub gr5,gr4,gr5
  48:	88 88 50 00 	ori gr5,0,gr4
  4c:	88 a0 40 04 	slli gr4,4,gr4
  50:	88 00 41 05 	sub gr4,gr5,gr4
  54:	8a 00 61 04 	sub gr6,gr4,gr5
  58:	80 54 50 00 	subicc gr5,0,gr0,icc0
  5c:	e0 18 00 09 	bne icc0,0x0,80 <main+0x80>
  60:	88 c9 20 00 	ldi @(gr18,0),gr4
			60: R_FRV_GOT12	_gp
  64:	8a f8 00 00 	sethi hi(0x0),gr5
			64: R_FRV_GPRELHI	.rodata
  68:	8a f4 00 00 	setlo lo(0x0),gr5
			68: R_FRV_GPRELLO	.rodata
  6c:	88 00 50 04 	add gr5,gr4,gr4
  70:	90 88 40 00 	ori gr4,0,gr8
  74:	9e 89 20 00 	ori gr18,0,gr15
  78:	80 3c 00 00 	call 78 <main+0x78>
			78: R_FRV_LABEL24	puts
  7c:	c0 1a 00 32 	bra 144 <main+0x144>
  80:	8c c8 2f fc 	ldi @(fp,-4),gr6
  84:	88 f8 66 66 	sethi 0x6666,gr4
  88:	88 f4 66 67 	setlo 0x6667,gr4
  8c:	88 00 62 04 	smul gr6,gr4,gr4
  90:	8a b0 40 01 	srai gr4,1,gr5
  94:	88 b0 60 1f 	srai gr6,31,gr4
  98:	8a 00 51 04 	sub gr5,gr4,gr5
  9c:	88 88 50 00 	ori gr5,0,gr4
  a0:	88 a0 40 02 	slli gr4,2,gr4
  a4:	88 00 40 05 	add gr4,gr5,gr4
  a8:	8a 00 61 04 	sub gr6,gr4,gr5
  ac:	80 54 50 00 	subicc gr5,0,gr0,icc0
  b0:	e0 18 00 09 	bne icc0,0x0,d4 <main+0xd4>
  b4:	88 c9 20 00 	ldi @(gr18,0),gr4
			b4: R_FRV_GOT12	_gp
  b8:	8a f8 00 00 	sethi hi(0x0),gr5
			b8: R_FRV_GPRELHI	.rodata+0xc
  bc:	8a f4 00 00 	setlo lo(0x0),gr5
			bc: R_FRV_GPRELLO	.rodata+0xc
  c0:	88 00 50 04 	add gr5,gr4,gr4
  c4:	90 88 40 00 	ori gr4,0,gr8
  c8:	9e 89 20 00 	ori gr18,0,gr15
  cc:	80 3c 00 00 	call cc <main+0xcc>
			cc: R_FRV_LABEL24	puts
  d0:	c0 1a 00 1d 	bra 144 <main+0x144>
  d4:	8c c8 2f fc 	ldi @(fp,-4),gr6
  d8:	88 f8 55 55 	sethi 0x5555,gr4
  dc:	88 f4 55 56 	setlo 0x5556,gr4
  e0:	88 00 62 04 	smul gr6,gr4,gr4
  e4:	8e b0 60 1f 	srai gr6,31,gr7
  e8:	8a 00 41 07 	sub gr4,gr7,gr5
  ec:	88 88 50 00 	ori gr5,0,gr4
  f0:	88 a0 40 01 	slli gr4,1,gr4
  f4:	88 00 40 05 	add gr4,gr5,gr4
  f8:	8a 00 61 04 	sub gr6,gr4,gr5
  fc:	80 54 50 00 	subicc gr5,0,gr0,icc0
 100:	e0 18 00 09 	bne icc0,0x0,124 <main+0x124>
 104:	88 c9 20 00 	ldi @(gr18,0),gr4
			104: R_FRV_GOT12	_gp
 108:	8a f8 00 00 	sethi hi(0x0),gr5
			108: R_FRV_GPRELHI	.rodata+0x14
 10c:	8a f4 00 00 	setlo lo(0x0),gr5
			10c: R_FRV_GPRELLO	.rodata+0x14
 110:	88 00 50 04 	add gr5,gr4,gr4
 114:	90 88 40 00 	ori gr4,0,gr8
 118:	9e 89 20 00 	ori gr18,0,gr15
 11c:	80 3c 00 00 	call 11c <main+0x11c>
			11c: R_FRV_LABEL24	puts
 120:	c0 1a 00 09 	bra 144 <main+0x144>
 124:	88 c9 20 00 	ldi @(gr18,0),gr4
			124: R_FRV_GOT12	_gp
 128:	8a f8 00 00 	sethi hi(0x0),gr5
			128: R_FRV_GPRELHI	.rodata+0x1c
 12c:	8a f4 00 00 	setlo lo(0x0),gr5
			12c: R_FRV_GPRELLO	.rodata+0x1c
 130:	88 00 50 04 	add gr5,gr4,gr4
 134:	90 88 40 00 	ori gr4,0,gr8
 138:	92 c8 2f fc 	ldi @(fp,-4),gr9
 13c:	9e 89 20 00 	ori gr18,0,gr15
 140:	80 3c 00 00 	call 140 <main+0x140>
			140: R_FRV_LABEL24	printf
 144:	88 c8 2f fc 	ldi @(fp,-4),gr4
 148:	88 40 40 01 	addi gr4,1,gr4
 14c:	89 48 2f fc 	sti gr4,@(fp,-4)
 150:	88 c8 2f fc 	ldi @(fp,-4),gr4
 154:	80 54 40 64 	subicc gr4,100,gr0,icc0
 158:	b8 1a ff b4 	ble icc0,0x2,28 <main+0x28>
 15c:	a4 c8 10 00 	ldi @(sp,0),gr18
 160:	8a c8 20 08 	ldi @(fp,8),gr5
 164:	84 08 21 00 	ld @(fp,gr0),fp
 168:	82 40 10 20 	addi sp,32,sp
 16c:	80 30 50 00 	jmpl @(gr5,gr0)
Last modified:2009/04/17 01:12:56
Keyword(s):
References:[FizzBuzzAsm]